By Ashok Srivastava, Jose Mauricio Marulanda, Yao Xu, Ashwani Sharma
Discovery of one-dimensional fabric carbon nanotubes in 1991 by means of the japanese physicist Dr. Sumio Iijima has led to voluminous study within the box of carbon nanotubes for various functions, together with attainable substitute of silicon utilized in the fabrication of CMOS chips. One attention-grabbing characteristic of carbon nanotubes is that those will be metal or semiconducting with a bandgap reckoning on their diameter. looking for non-classical units and similar applied sciences, either carbon nanotube-based field-effect transistors and steel carbon nanotube interconnects are being explored greatly for rising common sense units and extremely large-scale integration. even supposing quite a few versions for carbon nanotube-based transistors and interconnects were proposed within the literature, an built-in method of lead them to suitable with the current simulators is but to be completed. This e-book attempts during this path for the carbon-based electronics via basics of solid-state physics and units.
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Extra resources for Carbon-Based Electronics: Transistors and Interconnects at the Nanoscale
16. , Farmer, D. , Gordon, R. , and Dai, H. (2004). , 4, 447–450. 17. Wind, S. , and Avouris, P. (2002). Fabrication and electrical characterization of top gate single-wall CNFETs (2002). J. Vac. Sci. Technol. B, 20, 2798–2801. 18. , and Mizutani, T. (2005). N-type carbon nanotube field-effect transistors fabricated by using Ca contact electrodes, Appl. Phys. , 86, 073105–073107. 19. , and Dai, H. (2003). Advances in complementary carbon nanotube field-effect transistors, IEDM Tech. 4. 20. , and Dai, H.
The voltage transfer characteristic of the inverter is included to show its full output voltage. The power supply voltage is 2 V. The input voltage is varied from 0 to 2 V and corresponding output voltage is obtained. In NAND and NOR gates, voltage transfer characteristics have been obtained for the following input conditions: setting one of the inputs to high (VDD) or low (VSS) and varying the other input or varying both of the inputs simultaneously, as shown in Figs. 10. It is seen that the inverter, NOR and NAND gates give full logic swing similar to inverter and gates designed in CMOS.
We have also reported in [40,41] a simple analytical solution under two limiting cases. 18) Limit 2, h >> 1: Current Transport Modeling where I E int6 c kT A=0 –A E 1 1 Ec 1 2 e + x x x +2 c 1– x + A + 2 2 kT 6 kT 2 1 Ec 1 1 E c 1 E c – x – Ax + + A 6 kT 2 2 kT 2 kT 3 1 1 5 E 1 + A2 – A2 x + c + A3 2 4 16 kT 6 2 1 3 1 Ec 2 5 Ec – x – x – x 24 24 kT 48 kT 2 1 Ec 1 2 Ec 1 2 1 Ec + A + A + Ax – A 2 kT 2 kT 6 6 kT 2 2 E 1 E 5 E 1 E + c 1+ A + c + A2 – A c – c .